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Honored Contributor
Honored Contributorabout ram_2_port ip core
In my project I used the ip core (ram_2_port).I add avalon_tristate_slave for the ram2port in the sopc builer.But I can't write to the ram2port_base.When I write 0x00 to the ram2port_base,it write to...
Altera_ForumHonored Contributor
Honored Contributorhere are my picture of my project.
http://www.qudoo.net/p?id=4028808e14ad4f050114af6350160c47&size=m http://www.qudoo.net/p?id=4028808e14ad4f050114af6350940c49&size=m http://www.qudoo.net/p?id=4028808e14ad4f050114af6351300c4b&size=m http://www.qudoo.net/p?id=4028808e14ad4f050114af6351fb0c4d&size=m I want to know how to configure the timing of the ram2port?
