About Power sequence

Thank you for answering.

Looking at the contents of "For your second question,...", it seems that it shows the relationship between the FPGA and the device connected to the power supply, but is that understanding correct?

Assuming that the above understanding is correct, if there are banks from A to F, and if only bank F has a different power supply voltage, VCCIO should rise at the same time as the device connected to each bank or at a specified timing. Is it correct to understand that the rising start of A to E and bank F may be different? (This is after observing the sequence Group1 → Group2 → Group3)

I apologize for the details, but it would be helpful if you could teach me.