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I do not think that you can use 1 input pair to get 25 steps, it will take many input pairs unless I am missing something.
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That example in link use ADC conversion Flash ADC type technique -> one comparator for each bite, but I plan to use same technique like SAR adc converters they have ONE comparator + one DAC and they are sersching analog signal by steps changing one of comparator inputs by DAC, I already created sutch type ADC using AVR atmega8 (500Ksps) but problem was that this serching algoritm tooks all mega8 instruction so when I add aditional code ADC speed decreases to 75Ksps (it is too slow)
I think that fpga could be solution (I already wrought some VHDL code but didn't tested jet coud has State machine (8 states) and consumes just 40Le and max clock speed is about 250Mhz :) so abvios that fpgas can outperform atmega8 more that 130X
I hope tomorow I will put 2.5V VCCIO and test this chanel (I will put some Osciloscope pictures too
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