Altera_Forum
Honored Contributor
11 years agoAbout converting two sof files to one jic file
Hi, I encountered some difficulties in creating jic file and need help.
I have two sof files and two jic files generated based on the sof file, either one jic works well after I program it into EPCS device, then I tried to combine the two sof files to a single jic file, the generating process is showed in the attached picture. But FPGA cannot boot from EPCS at all, I thought the two sof files were just saved in different areas of EPCS device, and FPGA will start from the 0 address of EPCS device, but it seems my idea is wrong, there must be some connections between the two sof files. Is there anybody clear about the issue? thanks a lot.