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Honored Contributor
Honored Contributorabout component
library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity mand2 is port( a,b:in std_logic; c:out std_logic); end mand2; architecture bb of mand2 is begin ...
Altera_ForumHonored Contributor
Honored Contributorthank you.when i add the Label,quartus ii reports error again.
Error (10800): VHDL error at p60.vhd(1): selected name in use clause is not an expanded name. but i've already add mand2.vhd to the current project.
