ContributorHello,
Working with A10 SoC Dev Board with a design based on GHRD. I would linke to configure FPGA with a .rbf file from HPS.
For ClycleV device it is needed to build the preloader and so on but I attempted to do it unsuccessfully. Process is not clear for A10 SoC in Intel documentation.
Is there any guideline? Thank you in advance
Frequent ContributorHi,
Please refer the below link for building the bootloader for A10 and create the FIT image with the FPGA programming files, used by SPL to configure FPGA.
https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10
Regards
Tiwari
Frequent ContributorHi,
Let me know if you have any question on this.
Regards
Tiwari
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