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Honored Contributor
Honored ContributorA simple problem with bidirectional bus in VHDL
The situation is: I have one bidirectional bus and two registers and two buffers tri-state. Just as you can see at this link: @@@@dl.dropbox.com/u/288645/Drawing1.png@@@@ But when I open the si...
Altera_ForumHonored Contributor
Honored ContributorOk, it worked great! (Just put the enable/disable commands inside the register and the HiZ treatment too).
But I've got another problem. When I simulate it, obviously, I do an assignment from the bus to the register (both 8bits-width), and sometimes the value received has some correct bits, but the others are "Uninitialized". Somebody knows how to fix this issue?
