Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

a question about rapidio 1x

Dear: Now I want to use rapidio 1x to communicate with TMS320C6455, The FPGA is stratix V. I don't want to use Qsys, so i use Avalon-ST Pass-Through Interface to instead it. is it right?...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

https://www.alteraforum.com/forum/attachment.php?attachmentid=9567

This is a signaltap about TMS320C6455 send 256B data to FPGA by a SWRITE packet.

sourceId : EE

destinationId : F0

ftype : 6

address : 88888888

Now, if i want to send 256B data to TMS320C6455 by a SWRITE packet, what i should write the address in gen_tx_data