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Altera_Forum
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16 years ago

8b10b clock recovery?

Would it be possible to use an Altera FPGA (Arria II GX or Cyclone IV GX) to snoop on a 2.5 Gbps PCI Express link (via the PIPE interface), recover the clock and send out the recovered clock to one o...
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Altera_Forum
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16 years ago

Thank you for clarifying, I didn't get the simple setup. It should work this way.

Regarding the purpose of your measurement, a transmission line actually is not contributing jitter to the signal directly. It's main influence is frequency dependant signal attenuation, it's also causing reflections at the connectors, possibly generating cross-talk (e.g. between RX and TX pairs). In so far it can affect the eye-diagram quality. Crosstalk can convert to signal edge jitter, signal attenuation can increase the jitter of the succeeding receiver. (The latter can't be seen directly).