8 SPI Master to be used in Cyclone V 5CSXFC5C6

We need to support 8 SPI slave device i.e. we Need 8 SPI - 4 wire Master signals for our support.

We don't want to control our 8 SPI slave device with CS (Chip select), we need 8 separate SPI 4-wire signals.

In Cyclone V we have only 2 SPI Master signals with 2 CS.

My question is that whether we can assign any FPGA GPIO as SPI signals (SPI_CLK, SPI_MOSI, SPI_MISO) and whether we can use SPI IP Core for the GPIO we have selected.