Forum Discussion
Altera_Forum
Honored Contributor
16 years agotry using the numeric_std package to do this:
signal a : unsigned(71 downto 0);
signal b : unsigned(71 downto 0);
signal c : unsigned(15 downto 0);
..
a <= b/c;
Have lots of redundant pipeline stage registers before the divide and turn register retiming on. From a discussion in another thread, it appears it will work, but not be as efficient as the megafunction.