Forum Discussion
ShivaKi
New Contributor
New Contributor5CEBA7F27C8N FPGA FF placement setting
Hello, For 5CEBA7F27C8N FPGA, please find below queries needed clarification. 1. What is meant by FF placement setting in FPGA design? 2. For what kind of signals, this FF placement setting to be...
sstrell
Super Contributor
Super ContributorFlipflops and all logic are placed by the Fitter when you compile the design. If you are referring to the registers directly in the I/O elements, referred to as the fast I/O elements, you can enable assignments in the Assignment Editor to make use of them. Other than that, most folks don't manually place individual registers except in extreme cases (like just missing meeting timing).
