50 Mhz pulse capture in 20 Mhz domain

It really depends how critical the system is. The basic setup is to double register a signal to prevent meta-stability. This will mean you need to hold the signal in the 50MHz clock domain for at least 3 clocks, or the 20MHz domain cant see it.

Ideally, you would have some form of handshaking - ie, you activate the signal in the 50MHz domain and wait until you get a response from the 20MHz before turning it off. This can slow the process down a lot, but it is much safer than simply passing it through a double register and hoping for a nice clean transition.

A Fifo is really overkill for a single bit control signal. but for multiuple parralell bits, it garantees they all arrive in parrallel, rather than having some of them lag.