Forum Discussion
Altera_Forum
Honored Contributor
8 years agoAh thanks, that's good to know. Routing a 4-pin active crystal oscillator's 12MHz output to both the FPGA and the MCU was indeed what I meant.
About the FPGA's PLL: Does sending a 12MHz clock signal to the FPGA and using the PLL to multiply it by 4 for internal use has any disadvantage versus sending a signal already at 48MHz to the FPGA? As far as I've read, using a PLL to multiply the input clock only uses the PLL subsystem as far as resources, and I didn't see anything that would suggest: "If you can input a signal already at the frequency you need, do it instead of using a PLL".