Forum Discussion
Altera_Forum
Honored Contributor
13 years agoYes - 'anyone ever' is a bit open!
Loosely there are three ways of calculating CRCs: 1) Bit by bit shift register, this probably uses the least logic, but will be slow. 2) Byte by byte lookup table (usually 256 entries). 3) Byte by byte combinational logic. For the usual 16bit crc used for hdlc the following C will work:static __inline__ uint32_t
crc_step(uint32_t crc, uint32_t byte_val)
{
uint32_t t = crc ^ (byte_val & 0xff);
t = (t ^ t << 4) & 0xff;
return crc >> 8 ^ t << 8 ^ t << 3 ^ t >> 4;
} I don't know if the ethernet crc reduces that well. I actually use a custom instruction based on the above. The vhdl compiler might manage to optimise a loop to the above, and might do something sensible for the 32bit version - but that might generate a massive amount of logic. Possibly a combinatorial version using a 4-bit lookup nested twice might work. The fewer bits you need to process at once the better.