Honored Contributor
Honored ContributorI have external comparators detecting the higher voltage peaks of a 5-30 MHz sinus of varying amplitude, and intend to use a couple of Flancters* to measure the delay from T=0 to each of the peaks. I can accept some delay in the signal chain as long as it is deterministic (and as long as the Flancter can reset between same-polarity peaks), but I must keep the unknown delays, ex. from overdrive dispersion or jitter, to a minimum (within reason), hence the idea to use multiple phase-shifted same-frequency clocks.
Given that higher frequency oscillators cost more and use more power, it seems like the best choice in this case is to use the PLL, and deal with the jitter. * https://www.doulos.com/knowhow/fpga/fastcounter/ http://www.floobydust.com/flancter/flancter_app_note.pdf
