10M02DCV36I7G - cheap, reliable clocking

Are you sure the MAX 10 fabric is fast enough to do what you need at 400MHz? The clock tree is rated for 416MHz in your speed grade, and the PLLs can handle 400MHz, but that doesn't mean you can do any real work at that frequency. I normally gauge the fabric speed by how fast the internal hard blocks can run (e.g., RAMs and multipliers). In an I7 MAX 10 18x18 multipliers are rated at 240MHz and M9K blocks are rated at 300MHz (both assume dual supply mode). Depending on what you're doing 400MHz sounds extremely aggressive. And multiple phases at 400MHz sounds off-the-charts aggressive.

As for using an internal PLL to generate the 400MHz clocks, my main concern would be jitter. The PLL output jitter spec is 300ps (max). That's a ton of jitter for a 400MHz clock. In fact 300ps represents about 1/8th of the clock period, or about 45 degrees. It also represents about half of your uncertainty spec.

To solve the jitter problem you could use an external quad clock generator like the Silicon Labs Si5338 that is used on a lot of Altera dev kits. I've used that device in several designs and they're great - and very low jitter. It may not fit within your "cheap" requirement but you may not have a choice given your design specs.

Tough design. Good luck.