10G Ethernet and 10G Base-R PHY Hardware Demonstration Design

Thanks Dave for your quick answer.

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When you access each board, are you making sure to open the correct device? SystemConsole 'get service paths master' will return the path to both boards. Do you select one entry for the transmitter and the other for the receiver? How do you know which is which? Hint: in the system design, make the DIP switches readable, and set them differently on each board :)

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I am not sure if I fully understood your point. As I understand, System Console command "get_service_paths master" will return a list of master services connected to the host PC. And because I use two different PCs, each connected to a board separately. So, each System Console gets the path to each board, and I don't have to select service for transmitter and receiver after command "get_service_paths master". Am I wrong here?

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Since the system is being accessed using SystemConsole, its most likely implemented using SOPC Builder or Qsys. Open the system design with the appropriate tool and you will see the address map defined there.

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The design is composed of one Qsys based system (10Gbps MAC+ 10GBASE-R), one Traffic controller (in verilog) and one System controller (in verilog). I opened the Qsys system to see the base addresses of the MAC and the PHY but there are not. The base addresses should be assigned somewhere else. Usually, where people assign base address for a HDL-based component like Traffic controller?

Thanks