Honored Contributor.sof is not generated. We have used megacore FFT function to build in to an IP of Qsys..it is generated without any error. but when we include this IP in our top level .sof and is not generated even if there is no simulation error.But when we exclude the FFT IP then .sof is generated.What is the problem?PLEASE HELP.
Honored ContributorHave a look at the assembler report. If the .sof file isn't generated you should have a message there explaining why.
Honored ContributorHi anik !
Did you purchase the megacore FFT IP ?Honored ContributorNO. I did not buy FFT Megacore IP. Assembler report shows no error.
Honored ContributorAnd no warnings? What does it say in the "Assembler Encrypted IP Cores Summary" and "Generated Files" reports?
Honored ContributorWill let u know soon..We will have to generat WEe it again..we are using a FULL version quartus not WEB edition but im afraid if its a licensed version or not. Also is there is procedure to folllow before we generate the megacore function..as for example going to the Altera>>IP>>FFT>>then install it or something..
Sorry to bother, we are undergrad students and very new in this field.Honored Contributorno, as long as you do all the steps in the megawizard. The last step will give you a list of all the files that are generated, and if you click ok they will be generated. Nothing more to do.
Honored Contributorwe can generate some files from this megawizard too..so can we be assured that there is no license issue..or IP buying thing required if some files are generated from the megawizard fft function?
and why is that when using a fft_wrapper.v file available on the internet we used in our system, .sof is not generated..but when we remove that from both Qsys and our main system's .qip file, .sof is generated.. We have tried the codes for a simple mux also, .sof is generated..Just dont know how to approach to this problem. thanks a lot.Honored ContributorNo the megawizard will still generate the files even if you don't have the license for the FFT core. When you don't have the license the design is compiled in a opencore evaluation mode. With the default settings this means it will generate a time limited .sof (and no .pof), but IIRC there is a setting somewhere that disabled opencore evaluation. In that case if you don't have a license no .sof file will be generated. I had a quick look at Quartus and I can't find this setting any more, I don't remember where Altera hid it.
But if you could just show your "Assembler Encrypted IP Cores Summary" it should tell if you have a license problem.Honored Contributor---------------------
; Table of Contents ; --------------------- 1. Legal Notice 2. Assembler Encrypted IP Cores Summary +---------------------------------------------------------+ ; Assembler Encrypted IP Cores Summary ; +--------+--------------------------------+--------------+ ; Vendor ; IP Core Name ; License Type ; +--------+-------------------------------+---------------+ ; Altera ; "FFT" (6AF7 0034) ; Unlicensed ; ; Altera ; Nios II Processor (6AF7 00A2) ; Licensed; ; Altera ; Signal Tap (6AF7 BCE1) ; Licensed ; +--------+-------------------------------+---------------+ So, what is the solution for " Altera ; "FFT" (6AF7 0034); Unlicensed ;" Help Us.Honored ContributorWhat do you have in the "Messages" section of the assembler report?
From your screenshot we know that you don't have the license for the FFT core. You can either buy the license, or try your design in evaluation mode. I found the setting you need... go to Assignments > Settings > Compilation process settings > More Settings... and check the value for "Disable OpenCore Plus hardware evaluation". If it is "On" then no .sof file will be generated. If it is set to "Off" (the default) then you will have a xxx_time_limited.sof (where xxx is your project name). When programming the FPGA with that time limited sof file, you will see a window saying that you are in OpenCore evaluation mode. Don't close that window or the FFT core will stop working.
