Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThat was a pretty good idea, i think. As you can see, the data bus just changes the first 16 bits and the output enable doesn't even work at all (the sram doesn't put anything on the bus). I don't know why this happens though, maybe you got an idea? I tried the sequence two times with nADSC enabled before read/write operations and without it and it doesn't change anything.