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Altera_Forum's avatar
Altera_Forum
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15 years ago

writing/reading sram with cyclone3 in vhdl

Hey, i'm trying to write and read to/from the sram with a cyclone3 fpga on a NEEK. I wrote a little code to check if it's working, but it doesn't and i tried very much around but to no avail. The ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I added an extra cycle with nOE = 0 but nothing changed. I attached 2 screenshots of SignalTap, maybe you'll find something :)

I don't get why the data signals behave like that, because i obviously put "11111111000000000000000000000000" in memoryData. :confused:

Does the numbers in the timeline represent the clock cycles or what do they stand for?