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Honored Contributor
Honored Contributorwriting/reading sram with cyclone3 in vhdl
Hey, i'm trying to write and read to/from the sram with a cyclone3 fpga on a NEEK. I wrote a little code to check if it's working, but it doesn't and i tried very much around but to no avail. The ...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- In VHDL1993 you aren't allowed to read back the value of an 'out' port. --- Quote End --- - Yeah, i know, but i'm not trying to do it in my code or did i miss something? --- Quote Start --- This is a problem for registered outputs, because to maintain the value of a register between clock cycles, you need to be able to read it back. --- Quote End --- - Why do i want to do that? (except for the nWE signal for which i already did it)
