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Altera_Forum's avatar
Altera_Forum
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15 years ago

WM8731 line-in to line-out question

Hey,

Did a search on the forums and couldn't find anything related to this topic. Hopefully, not a repost. Anyway, the setup: DE1 board with W8731L codec. I am pretty sure I have it configured correctly, my register settings are shown below:

--

i2cControllerData <= X"34"&i2cData;

-- data to be sent to audio code obtained via a MUX

-- the select bits for the MUX are obtained by a mini FSM

-- the 16-bit value for each setting can be found

-- in table 29 and 30 on pp. 46-50 of the audio codec datasheet

-- (on the DE1 system CD)

with muxSelect select

i2cData <= X"001F" when 0, -- Left input volume is maximum

X"021F" when 1, -- Right input volume is maximum

X"047F" when 2, -- Left output volume is maximum

X"067F" when 3, -- Right output volume is maximum

X"0812" when 4, -- No sidetone, DAC: on, disable mic,

X"0A06" when 5, -- deemphasis to 48 KHz

X"0C00" when 6, -- all on

X"0E01" when 7, -- MSB first, left-justified, slave mode

X"1002" when 8, -- 384 fs oversampling

X"1201" when 9, -- activate

X"ABCD" when others; -- should never occur

--

But, the moment I send the master clock to the chip, my line-in gets connected to my line-out. I am pretty sure I disabled bypass mode. I checked if my description above is working by turning off the DAC, it does turn off and I don't hear anything. But once I turn on the DAC and send the master clock, my line-in gets connected to my line-out. The only obvious way to turn off the codec is to disable the master clock. I am not even reading from or writing to the ADC and DAC data registers.

Any ideas as to why my line-in is getting connected my line-out by "default"? Checked datasheet for codec, DE1 User's manual etc., nothing obvious. Pretty sure I am overlooking something, don't know what.

Thanks.

Bart

PS: Attached two cell-phone shots from my logic analyzer. The first one shows the X"34001F" being transmitted correctly and the codec acknowledging transfer. The next pic. shows all 10 data packets on the i2c bus. So, I am pretty sure the timing is also correct.

11 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    Are you sure, that you didn't connect a loopback from ADCDAT to DACDAT?

  • Altera_Forum's avatar
    Altera_Forum
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    15 years ago

    --- Quote Start ---

    Are you sure, that you didn't connect a loopback from ADCDAT to DACDAT?

    --- Quote End ---

    Yup, pretty sure I didn't connect a loopback. Anyway, its no biggie, just interesting behavior. I did get the audio codec to properly with loopback, pure tune out etc.

    Bart
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    i need audio codec in VHDL for altera de2 board

    --- Quote End ---

    Hello, I need reference of audio codec in VHDL for altera DE2 board as well. Anyone can help?

    Your help will be much appreciated :)
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Hi,

    Thanks for sending the link. Will look through it and will need your help again if i have problem 'digesting' the code :)

    Appreciate your help ! Thanks again :)

    Regards

    HJ.C
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    --- Quote Start ---

    thanks Bart

    --- Quote End ---

    Hey,

    Unfortunately, the website has been removed and it will take me a couple of weeks to get the new site up since I am traveling. BUT I have attached the source and documentation to this thread. Again note that the design is for the DE1 board.

    Good luck.

    Bart
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    Thank you so much :)

    I will try to understand the code and ask question if i encounter problems. Thanks once again !