Forum Discussion
AnandRaj_S_Intel
Regular Contributor
6 years agoHi Sujisha,
As a designer, we need to control the IO Buffer output enable on the FPGA side.
The value of OE determines whether bidirectional pins is an input, feeding in input
, or a tri-state, driving out the value.
Refer below links
https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/design-software/verilog/ver_bidirec.html
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altiobuf.pdf
Regards
Anand
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