Forum Discussion
sstrell
Super Contributor
7 years agoYou set signal a (aka stableA) as a new clock domain for the rotaryEncoder, so it must be constrained with a generated clock constraint. stableA is based off metaA and metaA is based off enc_a, so metaA is a generated clock as well. Something like this would work:
create_generated_clock -source [get_ports enc_a] -multiply_by 1 [get_pins <register that creates metaA>|q] -name metaA
create_generated_clock -source [get_pins <register that creates metaA>|q] -multiply_by 1 [get_pins <register that creates stableA>|q] -name stableA
The set_clock_groups command only prevents analysis for data transfers between the two clock domains you mention. It does not constrain the clock that drives the rotaryEncoder.
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