What is the actual Maximum Frequency supported by DDR3 in the Cyclone5 GT device?
Hello,
I want to run the RTL at more than 150Mhz for DDR3.
I tried to verify this in the parameter settings of the DDR3 controller Uni-phy IP used in the NIOS II Ethernet system example design. In the settings the maximum AFI clock frequency is mentioned as 150 MHZ.
I referred the below mentioned document, in this it is mentioned that the maximum achievable frequency for cyclone devices is 125 MHz.
Please refer: page - 243, "Table 7-1: Configuration Schemes and Features Supported by Cyclone V Devices" of the below document:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_5v2.pdf
My query is as below:
1) What is the actual maximum achievable DDR frequency for cyclone 5 GT?
2) Let's say it is 150 Mhz for example, is it the final frequency that we can use or do we have to consider a safer value less than that?
Thanks and Regards
Susmita