Forum Discussion
YuanLi_S_Intel
Regular Contributor
6 years agoHi Rajaram,
May i know what is the reason to delay the DCLK? Are you connecting the flash memory device with 2 FPGA? Please clarify.
Regards,
YL
Hi Rajaram,
May i know what is the reason to delay the DCLK? Are you connecting the flash memory device with 2 FPGA? Please clarify.
Regards,
YL