Forum Discussion

SERMASWATHIKA's avatar
SERMASWATHIKA
Icon for Contributor rankContributor
2 years ago

warnings on fitter for design

Hi Team, I have compiled the design with ddr3,nios ii processor, avalon mm and other ip interfaces. I have used the ddr3 memory with 400 mhz and other interface uses afi_half_clk like that I ...
Fpga Devkit
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello SERMASWATHIKA,


By observing the warning messages, it's look like the clock signals are not assigned to any pins.

Can you check if all signals in the design have been assigned to pin location?


Regards,

Adzim


SERMASWATHIKA's avatar
SERMASWATHIKA
Icon for Contributor rankContributor
2 years ago

Hi,

i have checked the pin assignment file. Clocks are assigned properly. i have added the snippet for clock assignment, please check and give your review