Occasional ContributorHi, I would like to ask if this means NC. Besides enabling VREF NC, do I need to make any additional settings, such as FPGE firmware?
Super ContributorHi,
is the explanation in Pin Connection Guidelines unclear in any regard?
VREFB<#>N0
These pins are dual-purpose pins. For Banks 1A and 1B, VREF pins are shared.
Input reference voltage for each I/O bank. If a bank uses a voltage referenced I/O standard for input operation, then these pins are used as the voltage-reference pins for the bank.
If you are not using the VREF pins in banks or shared banks, connect unused pins as defined in the Intel Quartus Prime software.
When VREF pins are used as I/O pins, they have higher capacitance than regular I/O pins which will slow the edge rates and affect I/O timing.
Are you using voltage referenced I/O standard?
Occasional ContributorThank you for your response.
My confusion lies with the VREF pins. What is their intended purpose when I use them?
