video line buffer using m9k

thanks for your reply.

Yes, I was thinking of a dual prot ram, with a write enable tied up at vcc.

For the wr/read controller, I wrote something like that:

--- Quote Start ---

module controller_line_buffer (

input clk,

input reset,

input enable,

output reg [9:0] write_address,

output reg [9:0] read_address

);

reg was_greater;

initial begin

write_address<=10'b0;

read_address<=10'b0;

was_greater<=0;

end

always@(posedge clk ) begin

if (reset) begin

write_address<=10'b0;

read_address<=10'b0;

was_greater<=0;

end

else begin

if (enable) begin

write_address<=write_address+1'b1;

if (write_address>10'd719)was_greater <=1'b1;

if (write_address>10'd720)write_address<=10'b0;

end //end enable

if(was_greater) begin

read_address<=read_address+1'b1;

if (read_address>10'd719) read_address<=10'b0;

end//end was_greater

end//end else reset

end //end always

endmodule

--- Quote End ---

But i don't find it a good controller.

Any hits?

Phate.