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Altera_Forum
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15 years ago

VHDL:apcial_altera_wdr

hi,friend! it is VHDL, I can not understand the ext(a,b). example: constant active_width : integer := 16; constant offset_shift : integer := 16; wr_offset <= ext((a...
Altera_Forum's avatar
Altera_Forum
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15 years ago

thats better, but only if you include std_logic_unsigned or std_logic_signed packages, which are not standard packages.