Use UART controller from FPGA in CycloneV, DS1-Soc board

Hi Alex, thanks for your reply.

• I've been following the application note without success. I can expose HPS pins as indicated there (by assigning FPGA in the Peripheral Pin configuration in Platform designer and exporting them). I also connected them in the hps instantiation in the top level design and added the required AL_IOBUF instances.
• However given the application note is for another device, I cannot figure out how to proceed to the PAD connection. I.e when exporting uart0_tx and uart0_rx, quartus asks to connect them to a top level pin, and after that I couldn't find a way to apply proper pin assignment. Connecting them to B25 and C25 (the HPS pins associated to those signals in the board datasheet) quartus will report error in pin assignment.

Additionally,

• i found ftp://ftp.intel.com.br/Pub/fpgaup/pub/Intel_Material/16.1/Tutorials/Accessing_HPS_Devices_from_FPGA.pdf as reference
• all says that LoanIO is the way to go. I have configured everything in Platform Designer, connected the exported LOANIO pins in the top level.
• Again I cannot figure out how to do the pin assignment for those exported signals.