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Altera_Forum
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14 years ago

Unwanted frequency shift in DA-converted signal

Hi, i use Matlab/Simulink and DSP Builder for my project. In Matlab, I generate a digital source signal and program it in a LUT-Block in Simulink. This Block then sends the data to my DACs...
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Altera_Forum
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14 years ago

You didn't tell yet the involved DDS phase accumulator resolution. Insufficient accumulator bitwidth or coefficient calculation error would be the only plausible explanation in my opinion, assuming your analyzer has suffcient accuracy. Dependent on the specification, a crystal oscillator must be expected to have up to 100 ppm frequency error which adds to the DDS error.

You would want to check the clock frequency error separately.