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Vandana_GS
New Contributor
New ContributorUnable to generate output for 32bit real and imaginary data in hardware implementation for Agilex 7
Hi, I'm trying to do the hardware Implementation for a complex code containing real and imaginary 32 bits. I have two LED PIN options in the agilex board: Terasic Agilex SOM Module FPGA: Agilex AGF...
You may view the Signal Tap training video here:
https://learning.intel.com/Developer/learn/learning-plans/245/using-the-signal-tap-logic-analyzer
Additionally, you can refer to the Application Note on how to use it:
Regards,
Richard Tan
sstrell
Super Contributor
Super ContributorThis doesn't really help. Without seeing code, there is no way to understand why bits are getting flipped when you don't expect it. I/O pin selection doesn't really matter here.
