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Harsha4's avatar
Harsha4
Icon for New Contributor rankNew Contributor
1 year ago

Unable to detect 100Hz input signal properly

Hi, We are using cyclone10lp in one of our design. In that design, we are trying to take a 100Hz clock input and use it for some application but as soon as it enters FPGA the signal is getting rand...
Fpga Devkit
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
1 year ago

Hi,
I was under the assumption that Schmitt-Trigger function is supported with Cyclone 10 LP for all I/Os, but that's only the case for MAX 10 FPGA series.

Possible options for Cyclone 10 LP are
- external Schmitt-Trigger
- digital debounce logic, suppressing succeeding edges for a certain time period after first rising or falling edge
- implement the 100 Hz input as bidirectional inout pin with disabled output and enable bus-hold feature, can work as Schmitt-Trigger emulation in combination with source impedance.