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Altera_Forum
Honored Contributor
Honored ContributorTwo Master RAM Access
Hi i m using NEEK and i m trying to get a hugh amount of Data from an Verilogfile to the NiosII Now i tried to include an Avalon MM Master (Template for Burst Writing) to the SoPC that connect...
Altera_ForumHonored Contributor
Honored ContributorSo your HDL is overwriting the startup code, which isn't good... Is you application also located on the DDR?
The best way to do it would be to have your software allocate a memory block and give its address to your HDL through a register (you'll need an Avalon slave interface for that).
