Hi,
I've got a pci express demo board and i want to use GbEthernet communication.
For now, I was able to instantiate TSE MAC and make logic for initialization. with a big sate machine just like in the provided altera test bench. That seem's to work.
But when i send frame on tx fifo interface, nothing come back on the rx fifo interface. And loopback is activate... I think some initializations are missing. I put below my init sequence. could you help me and say me if I wrong or not ?
Init TSE MAC Sequence:
- Read Version (@0x00) and check 0x00000800
- Write Scratch (@0x01) to 0xAAAAAAAA, readback and check
- Write Config (@0x02) to 0x040083EB
TX_ENA & RX_ENA = 1
ETH_SPEED = 1
PAD_EN = 1
CRC_FWD & PAUSE_FWD = 1
PAUSE_IGNORE = 1
TX_ADDR_INS = 1
LOOP_ENA = 1
RX_ERR_DISC = 1
- Write mac_0 & mac_1 (@0x03 & 0x04) to 0x22334450 & 0x0000EE11 (choose MAC: EE1122334450)
- Write ipg length (@0x17) to 0x0C
- Write frame length (@0x05) to 1518 (0x5EE)
- Write pause quanta (@0x06) to 0x0F
- Write rx_section_empty (@0x07) to 0x00
- Write rx_section_full, tx_section_empty, tx_section_empty (@0x08, 0x09, 0x0A) to 0x10
- Write rx_almost_empty, rx_almost_full, tx_almost_empty (@0x0B, 0x0C, 0x0D) to 0x08
- Write tx_almost_full (@0x0E) to 0x0A
- Finally, Write mdio_addr0 (@0x0F) to 0x12.
(Sorry for all this details but I wan't you have all the informations to help me!)
Did I forget something during init process ?
Could you help me ?
Thanks you very much!
Fabrice.