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Altera_Forum's avatar
Altera_Forum
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16 years ago

TSE connection problem

Hi all, I got a problem when I tried to connect the TSE MAC to the PHY, some thread said that the enet_gtx_clk should be connected to a 25MHz clock along with the tx_clk_to_the_tse_mac, but my...
Altera_Forum's avatar
Altera_Forum
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16 years ago

The errors with DDIO are probably because the RGMII interface uses DDR. You would need to change the SOPC system to have a GMII interface out of the TSE, put your scrambler/encoder, and then do the conversion to RGMII yourself, using DDR inputs/outputs.

For the flash address bus, I don't understand your question... address_to_the_cfi_flash_64m[25:1] is an output of the SOPC component, fsa in an output of the design. Just connect them together.