Try to program FPGA from flash memory, I build a PFL IP project with MAX II CPLD chip and generate .pof. While after CPLD programming, the unexpected errors in JTAG server happened,code 12,84,44.

The development board is "stratix IV GX FPGA development board,530 edition". As the description in the reference manual, I program the CPLD PFL .pof into MAX II CPLD and it can configure the FPGA fro...