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Altera_Forum
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16 years ago

Trouble loading User design to FPGA

Hi, preface: I currently have a design that runs great on a NiosII CycloneII Dev Board. I am trying to port my design over to the NiosII StratixII Dev Board, but was running into problems (th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I am trying to program the FPGA directly through the JTAG port. The FPGA is "successfully" programmed and then it runs for about half a second and then the board stops and programs itself with the factory configuration.