Forum Discussion
Altera_Forum
Honored Contributor
17 years agoYup.. I have double-checked the pin assignment and they matched exactly the same as shown in reference manual of Stratix III.
Also i don't need to make any changes on pin assignment because i use the standard example from Stratix III. It's there from the beginning. BTW, I'm wondering about that wierd reset issue with on-board Marvell PHY.. For this reset circuitry, i was following an example posted on this forum, however i checked its delay between user_resetn and enet_resetn is quite long according to his design.. Could this be an issue here?