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Altera_Forum
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17 years ago

Triple speed ethernet and Marvell Phy on Stratix III

Hi.. Need help here!! I've been struggling for a couple weeks. I have a stratix III board with a on-board Marvell PHY. I just tried to make a triple speed ethernet working on MII mode (10/10...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

The ethernet tx clk comes from the PHY when using MII, or comes from the FPGA when using GMII. So in your case both rx and tx clocks should be inputs.

Did you double check the assignments for these two pins? Are they inputs, with the correct I/O standard? Are they connected to the correct pins of the PHY on your board?