Transfer Data from Nios II to FPGA using Avalon-ST

1) Not sure why you want to connect these status signals to the sink (which sink?). They are single bit Avalon streaming status signals that indicate when the FIFO is above or below the thresholds you've set, which is accessible via CSR access: https://www.intel.com/content/www/us/en/docs/programmable/683130/24-1/register-description-68335.html

2) This is Avalon streaming, not memory-mapped, so there would be no API. You would control whatever component drives data into the FIFO (another source component). I don't think NIOS has a streaming option (I could be wrong on that; and FYI you should be looking at NIOS V since NIOS II is basically discontinued at this point) so I'm not sure why you are looking at this FIFO instead of a memory-mapped FIFO.