New ContributorI'm a little confused about how timing constraint work while place and route. when we constraint some clock, how dose it lead or drive the tool place and route? And if there was some timing issue, such as negative slack, hot to fix it?
Super ContributorTiming constrain are base on how much clock constrain that you had input. For example, if you specify your clock constrain to be 400Mhz, it will try to place the logic as close as possible compare to 200Mhz.
For how to fix negative slack, you first need to understand how the theory behind the timing. You may refer to the below:
https://www.intel.com/content/www/us/en/programmable/support/training/course/odsw1115.html
Make sure you click on the follow on course so that you can fully understand the timing.
