Forum Discussion
JohnT_Altera
Regular Contributor
6 years agoHi,
May I know if you recompile your design using the 18.1 OpenCL BSP and use the generated bitstream to program the FPGA? May I know if you are observing the same error message if you are using the new generated bitstream?
- HIngl16 years ago
New Contributor
Hello,
Which file do i need to recompile please elaborate .
Thanks