THDB_ADA HSMC daughter card question

Hi Herbert,

For your first question, my understanding is the Nios II processor and the modules within the system can be driven by different clock pin with different frequency. In that case there shouldn't be any performance issue unless you plan to process the data sampled by the Nios II processor in real time.

For the 2nd part, please let me know if you still have any question based on my reply regarding the first one.

For the last question, I'm not sure if I understand what you are trying to ask exactly. The look-up table generated will be stored (likely in the on-chip memory) and the Nios II processor can send out the data for every clock cycle, though it'll be limited by the processing speed. Alternatively, the look-up table can be stored in the memory (can still be on-chip memory) and the module which handle the DA conversion can act as master to keep polling data from there to achieve maximum performance.

It's been quite a while since I play with this daughter card. I hope the explanation above makes sense to you and you'd find it useful for your application.

David from Terasic