Forum Discussion
NGoud
New Contributor
7 years agotest bench for pcie to ethernet interface on cyclone V
if we want to write a test bench for pcie to ethernet interface on cyclone V then where should i start from. can some one help me out with the steps to be followed in quartus tool.
Nathan_R_Intel
Contributor
7 years agoHie,
For generating a test bench and running simulation, you may refer to the following how-to-video. However, this is for a simple counter.
https://www.youtube.com/watch?v=qZNL1C0TwY8
For PCIe, you may refer to the PCIe user guide. (section 2.2)
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug_a10_pcie_avmm_dma-17-0.pdf
For Ethernet, you may refer to Ethernet user guide (section 1.3.2)
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20016.pdf
Regards,
Nathan