terasic Stratix III dev board clock info

Guys im planning to get this fpga board (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=260&revision=103&partno=1#section) granted that im sure it will operate on frequencies 200MHz ~ 400MHz.

I will not use the internal oscillator, but I will use the SMA connector to feed in my own external clock. The manual did not mention how much is the maximum allowed external clock frequency. It also did not mention the maximum data rate I can use with the data connectors HSTC and exapnsions.

Would u plz help me figure those two information out?

If this board is not suitable would u recommend other board with the above clock feature?