Hello DubFX and Gygill. Sorry I didn't come back to this thread but for some reason the forum never notified me there had been replies to my post. Way to go Altera... forums that are just as bugged as Quartus and Eclipse, that's what I call pushing internal consistency a bit too far :-)
Gygill : I don't think it's a good idea to try and control the LT24 without an MCU : the initialization sequence and its timing are relatively complex, and so is the addressing scheme for the pixels unless you want to implement some sort of frame buffer. Meanwhile, a simple NIOS-II/e core that'll take less than 10% of your DE0-Nano's FPGA and about 8 KB of internal SRAM are all that's really necessary to control the LT24. And once you have a NIOS in your FPGA, you can always find something else for it to do.
If you really need to drive a graphic display using "regular" logic, then you should really spend time finding the a display with a controller chip that's easy to program. I don't examples, I really just plop in an MCU any time I need to drive a display, it just makes sense.
DubFX : the "painter" demonstration really works. Be careful however to connect the LT24 on the correct GPIO connector, as it only supports one (GPIO1, IIRC). To run the demo make sure you follow the instructions from Terasic to the letter : trying to synthesize and compile the code on your own will not work, I think that's what you must have tried to do.
To anyone interested : the Terasic demo project includes an LT24 controller IP block for Qsys that you can install and use in your projects. This controller is, however, a bit half-assed : it doesn't generate a reset signal so you'll also need to instantiate a PIO to drive the LT24's reset.
In terms of performance, I've tested it at up to 130 MHz on the DE0-Nano (NIOS-II/f core + internal SRAM).
The character fonts can be lifted from the demo code, but I suggest you write your own routines to display them : while the Terasic functions have a good API, their implementation is crappy beyond words.
I'm considering starting a blog that will include FPGA resources targetting Terasic boards. When I do that, I'll give you a link.