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Altera_Forum
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13 years ago

Terasic DE2-115 Flash programming

Good morning,

Have been developing FPGA and NIOS-based SW for DE2-115 using USB blaster to load SOF and elf files for debugging.

Now want to permanently program FPGA and FLASH. Have been able to load POF into FPGA. Can execute NIOS SW from SDRAM. However, it fails to execute when I try to flash it. Following is the process I've used.

In SOPC Builder, changed reset from SDRAM to CFI_FLASH for the CPU component

Rebuilt SOPC

Rebuilt system in Quartus

Reloaded POF

In NIOS, edited BSP and changed .text and .rodata elements to cfi_flash (I noticed that the reset vector is also configured for CFI flash as well).

Regenerated BSP

Cleaned BSP

Cleaned Application

Rebuilt BSP

Rebuilt Application

In NIOS Flash programmer, user BSP Settings and select ELF file generated above.

Program flash (No errors annunciated).

Would appreciate any guidance on what I may be doing wrong...

ME

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  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    I followed the steps above, however I am getting the following error:

    Error Code: 2 for command: nios2eds/bin/elf2flah --input="........ --output="....... --boot="....... --base=0x800000 --end=0x100000 --reset=0x800000
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Ok. I got everything working now.

    In BSP editor I linked everything to on-chip memory except for RESET Vector.

    Then in hal.linker I checked all boxes:

    allow_code_at_reset

    enable_alt_load

    enable_alt_load_copy_exceptions

    enable_alt_load_copy_rodata

    enable_alt_load_copy_rwdata

    Then when programming the flash I used the .sopcinfo file rather than .bsp settings options.

    This seemed to do the trick. My design now works at full speed and running out of on-chip RAM.
  • Altera_Forum's avatar
    Altera_Forum
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    13 years ago

    Dear all,

    Will this process allow to have the FPGA programmed permanently. I mean if you turn off an on the FPGA, will it keep the design?